How Well do you know the MIPS Architecture!!!!!!!!!!!!!

Let's see if you're the real deal, or the sunk punk. I definitely know I can't rhyme words better than that, or else I'd have a rap career! Let's hope the quiz is less cringe than my description of it!

MIPS college class takers, out! SM64 hackers, bye! Only real microprocessor nerds will be able to survive! Now go forth and prove your worth! Character limit

Created by: someone2639
  1. FINAL VALUE OF a0: `lui a0, 0x14; addiu a0, a0, 0x9000`
  2. WHAT IS the 6 bit opcode for `jal` on MIPSIII???
  3. WHAT does the `syscall` instruction do?
  4. HOW wide is the immediate value on the `break` instruction?
  5. WHICH one of these instructions is fake?
  6. You know all about Kernel Mode, but Which Instruction is BANNED in User Mode?
  7. HOW MANY delay slots do LW and SW need to work at full performance?
  8. WHICH exception is NOT maskable?
  9. Which instruction has to run between an atomic `LL` and `SC` variable check for it to fail?
  10. How Many register arguments does the `jalr` instruction officially take?

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Quiz topic: How Well do I know the MIPS Architecture!!!!!!!!!!!!!

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